Introduction
The ARM Cortex-A mobile application processor product line spans several generations and three major product categories. Some developers and SoC designers have gone through the launch of one or more new ARM processors, and they know how the product line has evolved from a single high-performance general-purpose CPU design to three different product lines, targeting high-end, mid-range, The entry-level mobile device SoC market has benefited them a lot.
Cortex-A8
ARM introduced the Cortex-A8 processor to the market in 2005 and was the first processor to support the armv7-a architecture. ARMv7 includes three key elements: the NEON Single Instruction Multiple Data (SIMD) unit, the ARM trustZone security extension, and the thumb2 instruction set, which reduces the code length with 16-bit and 32-bit mixed-length instructions. The Cortex-A8 is the first super scalar processor based on the new ISA implemented by ARM: it implements a fully dual transmit pipeline, which means that cortex-a8 can simultaneously issue any two data-independent sequences that appear in the instruction stream. instruction. However, it cannot be used to fire or undo instructions in an out-of-order manner – this feature is only implemented in later designs.
When we launched the Cortex-A8, many partners thought that this processor was overkill on mobile phones. They naturally questioned, “Is the customer browsing the Internet on the mobile phone? It is unlikely.†But we and Some of the industry's leading thought leaders are working together to bring products that customers will need, especially since the high-bandwidth wireless connectivity (3G) is already available when the Cortex-A8 is in volume production in 2008, and large screens are also used for mobile devices. The innovative mobile industry is taking advantage of this product: the launch of the Cortex-A8 chip is just the right time to catch up with smartphone shipments.
Cortex-A9
Shortly after the introduction of the Cortex-A8, ARM introduced the first multi-core ARMv7 CPU: cortex-a9. The Cortex-A9 uses hardware modules to manage cache coherency between one and four cores in a CPU cluster, adding an external L2 cache. In theory, customers can design a small version of the Cortex-A9 that does not include L2 cache. This design allows for the elimination of logic modules that manage cache coherency to achieve a smaller single core design. But in reality, most designs use dual-core or more cores with a second-level cache. In addition, at the end of 2011 and early 2012, when mobile SoC designers could adopt multiple cores, the breakthrough in improving performance shifted from improving single-core performance to increasing the number of cores. The flagship high-end mobile CPU quickly moved from the original dual-core topology to the quad-core Cortex-A9.
In addition to opening multi-core performance gates, the single-clock cycle instruction throughput per Cortex-A9 processor is increased by approximately 25% compared to the Cortex-A8. This performance improvement is achieved by shortening the pipeline and out of order while maintaining similar power consumption and chip area, as well as integrating the neon SIMD and floating point functions in the early stages of the pipeline.
Cortex-A15
As the smartphone market began to accelerate, ARM once again foresees the ever-increasing demands of the ever-evolving mobile system for chip performance. To this end, ARM has developed a processor with a significant increase in performance to target the new high-end mobile market. Based on the already very powerful Cortex-A9, ARM has improved performance by more than 50% with cortex-a15. In addition, the Cortex-A15 introduces a series of architectural extensions that enable greater physical address space, hardware virtualization support, and extended conformance. In 32-bit systems, memory is divided into 2GB of device memory and 2GB of normal memory. When the device's RAM exceeds 2GB, it becomes extremely important to have a larger physical address space. ARM and other partners have also been exploring the use of virtualization technology in user operating systems and similar application scenarios in business mobile systems and bring-in devices. . Extended Consistency is used in the big.LITTLE processor technology to provide a way to reduce average power consumption and optimize for maximum performance under power-constrained conditions.
The Cortex-A15 cluster integrates a monitoring control unit (SCU) for hardware consistency, with one to four CPU cores per cluster and integrated L2 cache controllers – all ARM Cortex-A series CPUs after the Cortex-A15 This topology is used.
Continuously breaking performance limits in mobile devices
Comparing the performance of the Cortex-A series of high-end processors, we can see that the performance of the Cortex-A8 1GH processor has increased significantly since its launch in 2008.
The consistency extension mechanism, implemented as AMBA ACE, makes the big.little SoC shown below possible. In the big.LITTLE system, a “large†CPU cluster is typically implemented and tuned to meet high performance requirements, while “small†CPU clusters are tuned for energy efficiency. In a typical workload, the LITTLE processor can handle most of the work, while the "big" CPU cluster has less than 10% activation time and in many cases less than 1% of the total CPU runtime. With the CoreLink CCI-400 Cache Coherent Interconnect component, CPU clusters can listen to caches of other clusters, enabling fast migration of software threads from one cluster to another.
Cortex-A12
With the explosive growth of the smartphone market, SoC vendors and OEMs have divided the market into flagship high-end, mid-range, and low-cost entry levels. With the emergence of these market segments, ARM has been defining different processors specifically for the above three levels of market. The cortex-a12 is a new processor with a new microarchitecture designed for the fast-growing mid-range mobile market. The following figure shows the size of these market segments and the ARM Cortex-A products for these market segments:
The Cortex-A12 is designed for mid-range mobile SoCs to meet the chip area and power requirements of this market segment. It uses an out-of-order dual-execution pipeline with performance that is 40% higher than the Cortex-A9 currently used in many mid-range mobile SoCs. The Cortex-A12 was introduced to the market in mid-2013 and is expected to be in volume production in 2014. It is a 32-bit processor with the same physical address extension and associated architectural features as the Cortex-A15.
The Cortex-A12 offers near-Cortex-A15 performance in many, but not all, use cases. The Cortex-A12 is also optimized for mid-range mobile design, eliminating some enterprise features and using a slightly simpler pipeline, so the Cortex-A15 can be found on high-end devices across multiple markets, while the Cortex-A12 Designed specifically for mid-range mobile design.
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