figure 1
For SoC designs with embedded high-resolution audio converters and audio amplifiers or highly sensitive MEMS, this change will jeopardize the overall performance of the SoC, especially the audio quality will be severely affected, and humming noise will be heard.
The characteristic of this noise is audible because it is not random noise. In fact, noise with an amplitude as low as 10mv can be heard by the human ear if it occurs at a fixed rate. This noise is more annoying than random noise of greater magnitude.
The best way to prevent GSM noise from degrading audio quality is to use a linear regulator (LR) with very low dropout (LDO) and low output noise to power the audio amplifier directly from the lithium-ion battery. This LDO linear regulator is used as a "cleaning" or filtering module for the amplifier power supply.
The key criterion for choosing the best linear regulator to prevent GSM noise is the regulator's ability to suppress noise from the input voltage, expressed as the power supply rejection ratio (PSRR). But the PSRR index should also be considered in conjunction with the transient response and voltage drop characteristics of the linear regulator.
Power supply rejection ratio
PSRR represents the regulator's ability to keep the output voltage stable when the input voltage changes. PSRR must be specified within a certain frequency range (including of course the critical 217 Hz value) and the maximum output current of the regulator design. In fact, even if the voltage regulator reaches the maximum load requirement (the maximum voltage drop), the suppression capability must be ensured. Usually PSRR performance is defined at the frequency of 10kHz, which may not correctly reflect the expected noise suppression performance at 217Hz.
Conclusion 1: The PSRR specification must be analyzed over a complete frequency range to correctly calculate the regulator ’s sensitivity to any possible noise source (including 217 Hz).
Transient response and voltage drop
PSRR is not the only indicator to ensure that no noise can be heard at the audio output. The transient response characteristics of the linear regulator, that is, the ability of the regulator to maintain the output voltage at an ideal stable value under sudden changes in power supply or load, is also very important.
Assuming that Vin is the input voltage, Vout is the output voltage, and Voutreg is the stable output voltage, here are some points to consider:
Assume that Vdrop = the minimum voltage drop of the regulator (the minimum voltage difference between Vin and Vout)
â—Ž The linear regulator design is designed to maintain a fixed output voltage with a high PSRR when the input voltage changes.
â—Ž When Vin> Voutreg + Vdrop, the linear regulator works normally, such as outputting a stable voltage with a PSRR of 70dB.
â—Ž When Vin Therefore, the linear regulator only has a high PSRR when Vin> Voutreg + Vdrop is satisfied. Consider the case shown in Figure 2, where a linear regulator provides an interface between a 3.6V lithium-ion battery and an analog module that requires a stable 2.8V voltage. figure 2 It can be seen from Figure 2 how the 500mV transient of the battery voltage will be transferred to the LDO output according to the effective voltage drop of the linear regulator. The linear regulator (solid blue line) in row 1 has a voltage drop of less than 100mV, so it remains in a regulated state. In contrast, the linear regulator (red dotted line) in row 2 cannot maintain such a voltage drop because it requires a voltage difference of at least 400mV between the input and output voltages. Conclusion 2: The requirements for linear regulators with very small voltage drops are more stringent because the battery voltage will decrease over time, for example to 2.9V. It is important to maintain a stable voltage over the entire battery voltage range, and the conclusion from this is that the lower the voltage drop, the longer the battery's effective power supply time. Misunderstanding the PSRR indicator Linear regulators with a 400mV voltage drop specification are very common. Even the PSRR specification of this linear regulator is 85dB, but if the input voltage is lower than 3.0 + 0.4 = 3.4V (the regulator example in Figure 2), the regulator cannot filter out any noise. In this case, the actual value of PSRR is 0dB! As shown in Figure 2, the residual TDMA noise present at the output of regulator 2 is in the hundreds of mV and cannot be predicted using the PSRR indicator. Conclusion 3: In order to evaluate the residual noise at the output of the linear regulator, the effective voltage drop must also be considered. To help SoC designers compare two linear regulators, the voltage drop at maximum current must be given. This ensures that the linear regulator is properly calibrated to drive the specified load and that it can properly suppress noise from the input voltage under all operating conditions.
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